As integrated circuit devices, such a dynamic random access memory (DRAM), become more highly integrated the size of particular devices such as transistors and capacitors generally has to become smaller to achieve an increase in the degree of integration. Thus, as devices have become more integrated, typically, the effective area of capacitors has become smaller. With reduced area available for forming a capacitor it may become more difficult to achieve a desired capacitance using conventional dielectric films such as a nitride/oxide (NO) film or Ta.sub.2 O.sub.5 film.
In an effort to increase the effective area of a capacitor, three-dimensional storage electrodes such as cylindrical or fin type storage electrodes have been fabricated. However, the cylindrical or fin type capacitor typically has a complicated structure which is produced by a complicated and difficult fabrication process. As a result of the complicated fabrication process, the cylindrical or fin type storage electrodes may be uneconomical to produce. Furthermore, the difficulty in the fabrication process may result in degraded reliability of the cylindrical or fin type storage electrode capacitors over more conventional capacitors.
To solve the problems caused by reduced capacitor area, research was begun into high dielectric films. This research included materials having a perovskite structure, e.g., BaTiO.sub.3, PbTiO.sub.3, SrTiO.sub.3 (STO), Pb(Zr, Ti)O.sub.3 (PZT), and (Ba, Sr)TiO.sub.3 (BST). The dielectric constant of these high dielectric materials are 100 times higher than that of a NO film. Therefore, it is possible to achieve a desired capacitance with less area and without the need for a complicated cylindrical or fin-type electrode.
A conventional method of fabricating a capacitor utilizing these high dielectric materials is illustrated in FIGS. 1 to 5. FIG. 1 illustrates a polysilicon plug 12 formed on a semiconductor substrate 10 on which transistors are formed. As seen in FIG. 2 a diffusion barrier film 13 is formed to cover the polysilicon plug 12 and a lower electrode 14 is formed on the diffusion barrier film 13. As shown in FIG. 3, after forming the lower electrode 14 an insulating film 16 is deposited to cover the lower electrode 14 and the diffusion barrier film 13. An insulating film spacer 16a is then formed by etching back the insulating film 16 by performing an anisotropic dry etching process of the insulating film 16 as is shown in FIG. 4.
As seen in FIGS. 3 and 4, the insulating film spacer 16a is formed on both sides of the storage electrode 14 by coating an insulating film between and on the storage electrodes and performing an etchback process. However, to provide a good surface for forming a dielectric film on electrode 14 an overetch should be performed on the insulating film 16. The overetch of the insulating film 16 removes all the residual materials of the insulating film 16 on the lower electrode 14 and forms the insulating film spacer 16a. However, because the insulating layer 16 is overetched, a step difference A is produced between the lower electrode 14 and the spacer 16a. After formation of the insulating space 16a, a high dielectric film 18 and an upper electrode 19 are deposited on the lower electrode 14, as shown in FIG. 5.
An insulating film spacer 16a is formed because, generally, the high dielectric film 18 is deposited by sputtering. Deposition of the high dielectric film 18 may be easily performed by sputtering and reproducibility of the film is excellent. However, one disadvantage of depositing the high dielectric film by a sputtering method is that such a deposition typically provides poor step coverage of the high dielectric film. As a result it may be difficult to deposit the high dielectric film 18 on the side of storage electrode 14. The insulating spacer 16a is formed to fill in the area surrounding the electrode 14 in an effort to compensate for the poor step coverage of the high dielectric film. However, because of the etchback process the step A still exists between the insulating spacer 16a and the electrode 14. Since the step coverage of the high dielectric film 18 is low, the high dielectric film 18 is formed with weak coverage in the portion of the step A at the edge of the lower electrode 14. This weak coverage area may increase leakage currents at the edge of the electrode 14. Thus, the capacitor formed by the conventional methods may not achieve as high a capacitance value as would be possible if these leakage currents could be prevented.
In view of the above discussion, the need exists for additional improvements in high dielectric capacitors and the methods for fabricating high dielectric capacitors.